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Formal Equivalence Checking and Design Debugging

Posted By: AvaxGenius
Date: 8 Mar 2024 11:51:48
Formal Equivalence Checking and Design Debugging

Formal Equivalence Checking and Design Debugging by Shi-Yu Huang , Kwang-Ting (Tim) Cheng
English | PDF | 1998 | 238 Pages | ISBN : 079238184X | 16.7 MB

Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. Some novel approaches to the problems of verifying design revisions after intensive sequential transformations such as retiming are described in detail.
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Design and Verification of Microprocessor Systems for High-Assurance Applications (Repost)

Posted By: AvaxGenius
Date: 12 Aug 2020 15:57:58
Design and Verification of Microprocessor Systems for High-Assurance Applications (Repost)

Design and Verification of Microprocessor Systems for High-Assurance Applications by David S. Hardin
English | PDF | 2010 | 440 Pages | ISBN : 1441915389 | 5 MB

This book examines several leading-edge design and verification technologies that have been successfully applied to microprocessor systems for high-assurance applications at various levels – from arithmetic circuits to microcode to instruction sets to operating systems to applications. We focus on recent hardware, software, and system designs that have actually been built and deployed, and feature systems that have been certified at high Evaluation Assurance Levels, namely the Rockwell Collins AAMP7G microprocessor (EAL7) and the Green Hills INTEGRITY-178B separation kernel (EAL6+). The contributing authors to this book have endeavored to bring forth truly new material on significant, modern design and verification efforts; many of the results described herein were obtained only within the past year.
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